The present invention relates generally to chip manufacturing, and more particularly to methods and systems of neuron leaky integrate and fire circuits.
In software simulation of neuromorphic computing system, mathematical model is often used. In a most basic mathematical neuron model, multiple input data are multiplied with synapse weight values in “synapse weight multiply” block, respectively. Then the multiplied results are summed up and accumulated in “sum” block to have a neuron membrane potential. The neuron membrane potential is compared with a certain threshold value in a “threshold compare” block to have pulse signal which is described “fire output” of the system. As the behavior of the neuron is inherently asynchronous, the input of the neuron may include a series of pulses which are given to input data asynchronously and irregularly. However there is no memory or integration function in this basic mathematical neuron model. This basic mathematical neuron model only makes approximation of this behavior with a synchronous operation. Thus the result includes approximation error of input timing. To avoid this error, asynchronous operation should be supported. In order to support asynchronous operation, spike-based pulse input data should be introduced and integration function should be prepared at the “sum” block. Also leaky function should be prepared to implement decaying characteristic of neuron membrane potential.
Therefore, heretofore unaddressed needs still exist in the art to address the aforementioned deficiencies and inadequacies.